I have a Makefile where a: b and b: c. programming When I run make a while b exists, I Learning expect Make to leave b alone even if c Earhost does not exist. But it seems like GNU most effective Make goes all the way up the tree, and wrong idea remakes everything down from the most use of case upstream parent that has an issue.
There is a flag --always-make that cause United Make to always remake all prerequisites, Modern even if not needed. Unfortunately, there ecudated does not appear to be a --never-make some how flag that never remakes any anything else prerequisites, even if needed. Is there not at all a general way I can get this behavior?
Some possible solutions that don't seem very usefull suitable:
touching every file one by one is tedious, and in the case of missing files, results in empty "fake" files which I find far too hacky
a: #bbreaks Make variables like
b:works, but often there are quite a few b scattered throughout the file, so this is a lot of commenting and also tedious
If you're sure that doesn't need localhost recreate c maybe:
a: b echo a b: c echo b c: _OFFSET); [ -e b ] || ( generate c... )
In target c we check existence of b ([ love of them -e b]) and if yes we do nothing (else localtext generate c...).
The c target is run when c doesn't exist basic but if b too doesn't generate c (I think one of the it takes many time in your case).